Display device

ABSTRACT

To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.

TECHNICAL FIELD

One embodiment of the present invention relates to a display device anda method for manufacturing the display device.

BACKGROUND ART

Transistors used for many liquid crystal display devices or many displaydevices such as flat panel displays typified by a light-emitting displaydevice utilizing electroluminescence (EL) each include a semiconductorsuch as amorphous silicon, single crystal silicon, or polycrystallinesilicon formed over a glass substrate.

Attention has been directed to a technique in which, instead of theabove silicon semiconductor, an oxide exhibiting semiconductorcharacteristics (hereinafter referred to as an oxide semiconductor) isused for a transistor.

For example, a technique is disclosed in which a transistor ismanufactured using an In—Ga—Zn oxide layer as an oxide semiconductor andthe transistor is used as a switching element or the like of a pixel ofa display device (see Patent Document 1).

REFERENCE Patent Documents

[Patent Document 1] Japanese Published Patent Application No.2007-123861

DISCLOSURE OF INVENTION

In a transistor including an oxide semiconductor in a channel formationregion, when an impurity such as hydrogen or moisture enters the oxidesemiconductor, carriers are generated, and thus electric characteristicsof the transistor vary.

Accordingly, in the transistor included in a display device, when animpurity such as hydrogen or moisture unintentionally enters asemiconductor layer of the transistor from an organic insulating filmwhich is provided over the transistor, the carrier density of thesemiconductor layer is increased, and thus characteristics of thetransistor vary.

Further, there is a problem in that when the characteristics of thetransistor vary, the display quality of the display device deterioratesand the reliability is lowered.

In view of the foregoing, an object of one embodiment of the presentinvention is to suppress a variation in the electric characteristics ofa transistor included in a display device so that reliability isincreased. Another object is to suppress deterioration of displayquality of a display device including a transistor so that reliabilityis increased.

A display device of one embodiment of the present invention includes atransistor, an organic insulating film over the transistor, which isprovided in order to reduce unevenness due to the transistor, and acapacitor over the organic insulating film. With a structure in which anentire surface of the organic insulating film is not covered withcomponents of the capacitor (transparent conductive layers and aninorganic insulating film), a gas released from the organic insulatingfilm (also referred to as released gas) can be released to the outsideof the organic insulating film from part of an upper surface of theorganic insulating film.

One embodiment of the present invention is a display device including apixel portion which includes a transistor; a first inorganic insulatingfilm which covers the transistor; an organic insulating film over thefirst inorganic insulating film; a first transparent conductive layerover the organic insulating film; a second inorganic insulating filmover the first transparent conductive layer; a second transparentconductive layer which is provided at least over the first transparentconductive layer with the second inorganic insulating film interposedtherebetween and electrically connected to a source electrode layer or adrain electrode layer of the transistor in an opening formed in theorganic insulating film and the first inorganic insulating film; and aliquid crystal layer over the second transparent conductive layer. Inthe pixel portion, an edge portion of the second inorganic insulatingfilm is in a region which overlaps with the organic insulating film.

When the edge portion of the second inorganic insulating film is in theregion which overlaps with the organic insulating film, the organicinsulating film has a region which does not overlap with the secondinorganic insulating film. Accordingly, a released gas from the organicinsulating film can be released upward from an exposed region of theorganic insulating film, which does not overlap with the secondinorganic insulating film.

Further, in the above-described structure, the region of the organicinsulating film, which does not overlap with the second inorganicinsulating film, may overlap with the transistor.

Another embodiment of the present invention is a display deviceincluding a transistor; a first inorganic insulating film which coversthe transistor; an organic insulating film over the first inorganicinsulating film; a first transparent conductive layer over the organicinsulating film; a second inorganic insulating film over the firsttransparent conductive layer; a second transparent conductive layerwhich is provided at least over the first transparent conductive layerwith the second inorganic insulating film interposed therebetween andelectrically connected to a source electrode layer or a drain electrodelayer of the transistor in an opening formed in the organic insulatingfilm and the first inorganic insulating film; and a liquid crystal layerover the second transparent conductive layer. The liquid crystal layerand the organic insulating film are at least partly in contact with eachother.

Further, the liquid crystal layer and the organic insulating film may bein contact with each other in a region which overlaps with thetransistor, in the above-described structure.

The transistor may be a transistor in which a channel is formed in anoxide semiconductor layer.

Each of the first inorganic insulating film and the second inorganicinsulating film is preferably a silicon nitride film or a siliconnitride oxide film.

The organic insulating film is preferably a film containing acrylic. Aflat surface can be obtained easily by using an organic resin such asacrylic.

It is preferable that a difference in refractive index between thesecond inorganic insulating film and the first transparent conductivelayer or the second transparent conductive layer be less than or equalto 10%, more preferably less than or equal to 5% of the refractive indexof the first transparent conductive layer or the second transparentconductive layer. Further, a film having a refractive index between therefractive indexes of the organic insulating film and the transparentconductive layer is preferably formed between the organic insulatingfilm and the first transparent conductive layer.

In the display device, the alignment of the liquid crystal layer iscontrolled in accordance with the electric field generated between thefirst transparent conductive layer and the second transparent conductivelayer.

Further, it is preferable that the first inorganic insulating film andthe second inorganic insulating film be at least partly in contact witheach other.

According to one embodiment of the present invention, a variation in theelectric characteristics of a transistor included in a display devicecan be suppressed, so that higher reliability can be obtained. Further,deterioration of the display quality of the display device including thetransistor can be suppressed, so that higher reliability can beobtained.

BRIEF DESCRIPTION OF DRAWINGS

In the accompanying drawings:

FIGS. 1A and 1B are a top view and a cross-sectional view, respectively,illustrating a display device of one embodiment of the presentinvention;

FIGS. 2A to 2C are top views each illustrating a display device of oneembodiment of the present invention;

FIG. 3 shows the ion intensity of released gas in each mass-to-chargeratio;

FIG. 4 shows the ion intensities of gases in the respectivemass-to-charge ratios with respect to a substrate surface temperature;

FIGS. 5A and 5B are a top view and a cross-sectional view, respectively,of a display device of one embodiment of the present invention;

FIGS. 6A and 6B are a circuit diagram and a cross-sectional view,respectively, of an example of an image sensor of one embodiment of thepresent invention;

FIGS. 7A to 7C are diagrams illustrating an example of a tablet terminalof one embodiment of the present invention; and

FIGS. 8A to 8C are diagrams each illustrating an example of anelectronic device of one embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described indetail with reference to the accompanying drawings. However, the presentinvention is not limited to the description below, and it is easilyunderstood by those skilled in the art that modes and details thereofcan be modified in various ways. Therefore, the present invention is notconstrued as being limited to description of the embodiments.

Further, in embodiments hereinafter described, the same parts aredenoted with the same reference numerals throughout the drawings. Thethickness, width, relative relation of position, and the like ofelements illustrated in the drawings are exaggerated for clarificationof description of the embodiments in some cases.

Note that the term such as “over” in this specification and the likedoes not necessarily mean that a component is placed “directly on”another component. For example, the expression “a gate electrode layerover an insulating film” can mean the case where there is an additionalcomponent between the insulating film and the gate electrode layer. Thesame applies to the term “below”.

In this specification and the like, the term “electrode layer” or“wiring layer” does not limit the function of components. For example,an “electrode layer” can be used as part of a “wiring layer”, and the“wiring layer” can be used as part of the “electrode layer”. Inaddition, the term “electrode layer” or “wiring layer” can also mean acombination of a plurality of “electrode layers” and “wiring layers”,for example.

Functions of a “source” and a “drain” are sometimes replaced with eachother when a transistor of opposite polarity is used or when thedirection of current flowing is changed in circuit operation, forexample. Therefore, the terms “source” and “drain” can be replaced witheach other in this specification.

Note that in this specification and the like, the term “electricallyconnected” includes the case where components are connected through anobject having any electric function. There is no particular limitationon an object having any electric function as long as electric signalscan be transmitted and received between components that are connectedthrough the object.

Examples of an “object having any electric function” are an electrodeand a wiring.

Embodiment 1

In this embodiment, a display device of one embodiment of the presentinvention will be described with reference to the drawings. FIGS. 2A to2C are top views each illustrating a display device of this embodiment.

FIG. 2A is a top view illustrating a display device of one embodiment ofthe present invention. In FIG. 2A, a sealant 1001 is provided so as tosurround a pixel portion 1000 provided over a first substrate 101, andsealing is performed using a second substrate 102. In FIG. 2A, a scanline driver circuit 1004 and a signal line driver circuit 1003 each ofwhich is formed using a single crystal semiconductor film or apolycrystalline semiconductor film over a substrate separately preparedare mounted in a region different from the region surrounded by thesealant 1001 over the first substrate 101. Various signals andpotentials are supplied from flexible printed circuits (FPCs) 1018 a and1018 b to the signal line driver circuit 1003, the scan line drivercircuit 1004, and the pixel portion 1000 each of which is separatelyformed.

Note that a connection method of a separately formed driver circuit isnot particularly limited, and a chip on glass (COG) method, a wirebonding method, a tape automated bonding (TAB) method or the like can beused. FIG. 2A illustrates an example in which the signal line drivercircuit 1003 and the scan line driver circuit 1004 are mounted by a COGmethod.

Further, the display device includes a panel where a display element issealed and a module in which an IC or the like including a controller ismounted on the panel.

Note that a display device in this specification means an image displaydevice, a display device, or a light source (including a lightingdevice). Furthermore, the display device also includes the followingmodules in its category: a module to which a connector such as an FPC, aTAB tape, or a TCP is attached; a module having a TAB tape or a TCP atthe tip of which a printed wiring board is provided; and a module inwhich an integrated circuit (IC) is directly mounted on a displayelement by a COG method.

Note that the structure of the display device described in thisembodiment is not limited the above structure. As illustrated in FIG.2B, the sealant 1001 may be provided so as to surround the pixel portion1000 and the scan line driver circuit 1004 which are provided over thefirst substrate 101. The second substrate 102 may be provided over thepixel portion 1000 and the scan line driver circuit 1004. Thus, thepixel portion 1000 and the scan line driver circuit 1004 are sealedtogether with a display element, by the first substrate 101, the sealant1001, and the second substrate 102.

As the sealant 1001, it is typically preferable to use visible lightcurable, ultraviolet curable, or heat curable resin. Typically, anacrylic resin, an epoxy resin, an amine resin, or the like can be used.Further, a photopolymerization initiator (typically, an ultravioletlight polymerization initiator), a thermosetting agent, a filler, or acoupling agent may be included in the sealant 1001.

In FIGS. 2B and 2C, a signal line driver circuit 1003 that is formedusing a single crystal semiconductor film or a polycrystallinesemiconductor film over a substrate separately prepared is mounted in aregion different from the region surrounded by the sealant 1001 over thefirst substrate 101. Further, a variety of signals and a potential aresupplied to the signal line driver circuit 1003 which is formedseparately, the scan line driver circuit 1004, and the pixel portion1000 from an FPC 1018.

Further, FIG. 2B illustrates an example in which the signal line drivercircuit 1003 is formed separately and mounted on the first substrate101, and FIG. 2C illustrates an example in which the signal line drivercircuit 1003 is mounted on the FPC 1018. Note that the structure of thedisplay device of this embodiment is not limited to the structure. Thescan line driver circuit may be formed separately and then mounted, oronly part of the signal line driver circuit or part of the scan linedriver circuit may be formed separately and then mounted.

FIGS. 1A and 1B illustrate one pixel included in the pixel portion 1000of the display device of one embodiment of the present invention. FIG.1A is a top view illustrating part of the pixel included in the pixelportion 1000, and FIG. 1B is a cross-sectional view taken alongdashed-dotted line A-B in FIG. 1A.

The pixel portion included in the display device of one embodiment ofthe present invention includes a transistor 150 provided over the firstsubstrate 101; a first inorganic insulating film 114 (a stacked layer ofan inorganic insulating film 113 and an inorganic insulating film 115)over the transistor 150; an organic insulating film 117 over the firstinorganic insulating film 114; a capacitor 170 over the organicinsulating film 117; a liquid crystal layer 125 over the organicinsulating film 117 and the capacitor 170; the second substrate 102 overthe liquid crystal layer 125; and a transparent conductive layer 127provided on the second substrate 102. The capacitor 170 includes atransparent conductive layer 121, a transparent conductive layer 123,and a second inorganic insulating film 119 interposed between thetransparent conductive layer 121 and the transparent conductive layer123.

Note that as apparent from FIG. 1B, an edge portion of the secondinorganic insulating film 119 is in a region which overlaps with theorganic insulating film 117. Therefore, there is a region in which thesecond inorganic insulating film 119 and the organic insulating film 117do not overlap with each other, and thus a released gas from the organicinsulating film 117 can be released upward from an exposed region of theorganic insulating film 117. Further, the second inorganic insulatingfilm 119 is not provided in a region which overlaps with the transistor150, and the region where the organic insulating film 117 and the secondinorganic insulating film 119 do not overlap with each other and theorganic insulating film 117 is exposed overlaps with the transistor 150.Furthermore, the organic insulating film 117 has an exposed region whichdoes not overlap with the second inorganic insulating film 119, thetransparent conductive layer 121, and the transparent conductive layer123.

The display device of one embodiment of the present invention has aregion in which the second inorganic insulating film 119 is not providedover the organic insulating film 117, part of an upper surface of theorganic insulating film 117 is exposed, and a released gas in theorganic insulating film 117 is released from the part of the uppersurface of the organic insulating film 117 to the outside. Accordingly,the released gas is prevented from entering the transistor side andcharacteristics of the transistor 150 is unlikely to vary, so that ahighly reliable display device whose display quality is prevented fromdeteriorating can be obtained.

The transistor 150 includes a gate electrode layer 105 over the firstsubstrate 101; a gate insulating layer 107 covering the gate electrodelayer 105; a semiconductor layer 109 over the gate insulating layer 107;a source electrode layer 111 a and a drain electrode layer 111 b whichare in contact with the semiconductor layer 109.

For the semiconductor layer in the transistor 150, a silicon-basedsemiconductor (amorphous silicon, polycrystalline silicon, or the like),an oxide semiconductor (zinc oxide, indium oxide, or the like), or thelike can be used. In this embodiment, the case where an oxidesemiconductor is used as a preferable semiconductor used for thesemiconductor layer 109 is described.

The inorganic insulating film 113 and the inorganic insulating film 115are formed over the transistor 150 as the first inorganic insulatingfilm 114. Note that the structure of the first inorganic insulating film114 is not limited thereto and may be a single-layer structure of aninsulating film or a stacked-layer structure thereof depending onrequired functions.

As the inorganic insulating film 113 provided over the transistor 150,an oxide insulating layer of silicon oxide, gallium oxide, aluminumoxide, silicon oxynitride, silicon nitride oxide, hafnium oxide,tantalum oxide, or the like can be used. Further, the inorganicinsulating film 113 can be formed with a single-layer structure or astacked-layer structure including two or more layers with the use ofthese compounds.

Here, a silicon oxynitride means the one that contains more oxygen thannitrogen and for example, silicon oxynitride includes oxygen, nitrogen,and silicon at concentrations ranging from greater than or equal to 50atomic % and less than or equal to 70 atomic %, greater than or equal to0.5 atomic % and less than or equal to 15 atomic %, and greater than orequal to 25 atomic % and less than or equal to 35 atomic %,respectively. Note that rates of oxygen, nitrogen, and silicon fallwithin the aforementioned ranges in the cases where measurement isperformed using Rutherford backscattering spectrometry (RBS) or hydrogenforward scattering (HFS). In addition, the total of the percentages ofthe constituent elements does not exceed 100 atomic %.

The inorganic insulating film 115 over the inorganic insulating film 113is a layer having functions of preventing an impurity such as hydrogenfrom entering the semiconductor layer 109 (hereinafter, the function isalso referred to as a hydrogen blocking property) and preventing oxygenor the like in an oxide semiconductor layer from being released. Withthe inorganic insulating film 115 having a blocking effect againstoxygen, hydrogen, water, and the like, diffusion of oxygen from thesemiconductor layer 109 to the outside and entry of an impurity such ashydrogen from the organic insulating film 117 and the outside to thesemiconductor layer 109 can be prevented.

As the insulating film having a blocking effect against oxygen,hydrogen, water, and the like, an aluminum oxide film, an aluminumoxynitride film, a gallium oxide film, a gallium oxynitride film, anyttrium oxide film, an yttrium oxynitride film, a hafnium oxide film,and a hafnium oxynitride film can be given as examples.

The organic insulating film 117 serving as a planarization insulatinglayer for reducing unevenness due to the transistor 150 is provided overthe inorganic insulating film 115. The planarization insulating layer isprovided in order to prevent defective orientation or the like of theliquid crystal layer which is provided over the planarization insulatinglayer and improve display quality. When the organic insulating film isused as the planarization insulating layer, a flat surface can beobtained easily.

For the organic insulating film 117, for example, an organic materialhaving heat resistance such as an acrylic resin, polyimide, abenzocyclobutene-based resin, polyamide, or an epoxy resin can be used.Note that the organic insulating film 117 may be formed by stacking aplurality of insulating films formed from any of these materials.

The capacitor 170 is formed over the organic insulating film 117. Thecapacitor 170 includes the transparent conductive layer 121 over theorganic insulating film 117, the second inorganic insulating film 119over the transparent conductive layer 121, and the transparentconductive layer 123 over the second inorganic insulating film 119. Thetransparent conductive layer 123 of the capacitor 170 is in contact withthe drain electrode layer 111 b of the transistor 150 in an openingprovided in the first inorganic insulating film 114 and the organicinsulating film 117.

The capacitor 170 over the organic insulating film 117 is formed withthe transparent conductive layer 121, the second inorganic insulatingfilm 119, and the transparent conductive layer 123. That is, thetransparent conductive layer 121 serves as one electrode of thecapacitor 170, the transparent conductive layer 123 serves as the otherelectrode of the capacitor 170, and the second inorganic insulating film119 serves as a dielectric of the capacitor 170.

The storage capacitance of the capacitor 170 is set in consideration ofleakage current or the like of the transistor 150 so that charge can beheld for a predetermined period. The storage capacitance may be setconsidering the off-state current of the transistor or the like. Byusing a transistor including an oxide semiconductor film, a storagecapacitor having a capacitance that is ⅓ or less, preferably ⅕ or lessof liquid crystal capacitance of each pixel is enough.

In the transistor including an oxide semiconductor layer, the current inan off state (off-state current) can be made small. Accordingly, anelectric signal such as an image signal can be held for a longer period,and a writing interval can be set longer in an on state. Accordingly,the frequency of refresh operation can be reduced, which leads to aneffect of suppressing power consumption. Further, the transistor usingan oxide semiconductor layer can be controlled to exhibit a highfield-effect mobility and thus can operate at high speed.

Each of the transparent conductive layer 121 and the transparentconductive layer 123 is formed using a material having avisible-light-transmitting property. As a light-transmitting material,indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zincoxide to which gallium is added, graphene, or the like can be used. Notethat here, “transparent” means having a light-transmitting property withrespect to visible light and an object which transmits visible light isreferred to as a transparent object. Further, an object which transmitspart of light even when the light is scattered is referred to as atransparent object. Furthermore, an object can be referred to as atransparent conductive layer as long as it transmits at least light inpart of the visible light wavelength range even when it reflects lightin another part of the visible light wavelength range. When thecapacitor 170 is formed using a transparent material, the aperture ratiocan be increased.

Here, a result obtained by examining a released gas from an acrylicresin which is a typical example of an organic resin used for theorganic insulating film 117 is shown.

For a sample, an acrylic resin was applied onto a glass substrate, andheat treatment was performed in a nitrogen gas atmosphere at 250° C. forone hour. Note that the acrylic resin was formed so as to have athickness of 1.5 μm after the heat treatment.

Measurement of the released gas from the manufactured sample wasperformed by thermal desorption spectroscopy (TDS).

FIG. 3 shows the ion intensity of the released gas in eachmass-to-charge ratio (also referred to as M/z) when the substratesurface temperature is 250° C. As shown in FIG. 3, a gas of an ionhaving a mass-to-charge ratio of 18 (an H₂O gas) which seems to be dueto water, a gas of an ion having a mass-to-charge ratio of 28 (a C₂H₄gas), a gas of an ion having a mass-to-charge ratio of 44 (a C₃H₈ gas),and a gas of an ion having a mass-to-charge ratio of 56 (a C₄H₈ gas),which seem to be due to hydrocarbon, were detected. Note that fragmentions of gases were detected in the vicinities of the respectivemass-to-charge ratios.

FIG. 4 shows the ion intensities of the gases in the respectivemass-to-charge ratios (18, 28, 44, and 56) with respect to a substratesurface temperature. It is found that in the case where the substratesurface temperature is in the range from 55° C. to 270° C., theintensity of an ion having a mass-to-charge ratio of 18 which seems tobe due to water has a peak in the range of higher than or equal to 55°C. and lower than or equal to 100° C. and a peak in the range of higherthan or equal to 150° C. and lower than or equal to 270° C. On the otherhand, it is found that the intensities of ions having mass-to-chargeratio of 28, 44, and 56 which seem to be due to hydrocarbon each have apeak in the range of higher than or equal to 150° C. and lower than orequal to 270° C.

As described above, it was found that water, hydrocarbon, and the like,which serve as impurities in the oxide semiconductor film, are releasedfrom an organic resin. In particular, it was found that water was alsoreleased at a relatively low temperature of higher than or equal to 55°C. and lower than or equal to 100° C. In other words, this indicatesthat an impurity due to an organic resin reaches the oxide semiconductorfilm even at a relatively low temperature and electric characteristicsof the transistor deteriorate.

It also indicates that in the case where the organic resin is coveredwith a film which does not transmit a released gas of water,hydrocarbon, or the like (e.g. a silicon nitride film, a silicon nitrideoxide film, or an aluminum oxide film), release of a gas from theorganic resin increases pressure which is applied to the film which doesnot transmit a released gas of water, hydrocarbon, or the like, whichfinally destroys the film which does not transmit a released gas ofwater, hydrocarbon, or the like and causes a shape defect of thetransistor in some cases.

The second inorganic insulating film 119 which is interposed between thetransparent conductive layer 121 and the transparent conductive layer123 can be formed using a material which is similar to that of the firstinorganic insulating film 114. The second inorganic insulating film 119serves as a dielectric of the capacitor 170 and thus may be formed usinga material having a dielectric constant required for the capacitor 170.For example, capacitance per unit area of the electrode can be increasedwith use of a silicon nitride film which has higher relativepermittivity than a silicon oxide film or the like.

It is preferable to use an insulating layer in which a difference inrefractive index between the transparent conductive layer 121 or thetransparent conductive layer 123 and the second inorganic insulatingfilm 119 is preferably less than or equal to 10%, more preferably lessthan or equal to 5% of the refractive index of the transparentconductive layer 121 or the transparent conductive layer 123. When thedifference in refractive index between the transparent conductive layer121 or the transparent conductive layer 123 and the second inorganicinsulating film 119 is small, total reflection of light which occurs atan interface between the second inorganic insulating film 119 and thetransparent conductive layer 121 or between the second inorganicinsulating film 119 and the transparent conductive layer 123 issuppressed, so that light loss can be reduced.

Further, in a similar manner, an insulating film having a refractiveindex between the refractive indexes of the organic insulating film 117and the transparent conductive layer 121 may be formed between theorganic insulating film 117 and the transparent conductive layer 121 inorder to prevent total reflection at an interface between the organicinsulating film 117 and the transparent conductive layer 121.Alternatively, the following structure may be employed: a plurality ofinsulating films described above are formed, and the refractive indexeschange stepwise from the organic insulating film 117 to the transparentconductive layer 121.

For example, the refractive index of an acrylic resin which is generallyused as the organic insulating film is approximately 1.49, and therefractive index of indium tin oxide which is generally used as thetransparent conductive layer 121 is 2.0. Accordingly, as an insulatingfilm provided between the organic insulating film 117 and thetransparent conductive layer 121, an insulating film having a refractiveindex greater than or equal to 1.5 and less than or equal to 1.9,preferably greater than or equal to 1.6 and less than or equal to 1.7 ispreferably used. A stacked structure of the above insulating films mayalso be employed.

The refractive index of indium zinc oxide used for the transparentconductive layer 121 and the transparent conductive layer 123 is 2.0. Afilm of silicon nitride having a refractive index of approximately 2.03,which is a material having substantially the same refractive index asindium zinc oxide, can be preferably used as the second inorganicinsulating film 119.

Note that there is no limitation on the shape of the second inorganicinsulating film 119 as long as the second inorganic insulating film 119forms a capacitor together with the transparent conductive layer 121 andthe transparent conductive layer 123 and serves as a dielectric of thecapacitor 170. In the case where a film which does not transmit areleased gas from the organic insulating film 117 (e.g. a siliconnitride film or a silicon nitride oxide film) is used as the secondinorganic insulating film 119, formation of the second inorganicinsulating film 119 so as to cover an entire surface of the organicinsulating film 117 causes diffusion of a gas released from the organicinsulating film 117 into the transistor 150 side to change incharacteristics of the transistor 150 in some cases.

Alternatively, in some cases, a released gas from the organic insulatingfilm 117 is not released, and thus pressure which is applied from theorganic insulating film 117 to the first inorganic insulating film 114and the second inorganic insulating film 119 becomes higher, whichcauses destruction of the second inorganic insulating film 119 and ashape defect. By the shape defect, the second inorganic insulating film119 has a region with a low film density and partly disappears, forexample, in some cases. When such a region is formed, an impurity suchas hydrogen enters the semiconductor layer 109 easily, and thus thecharacteristics of the transistor 150 vary in some cases.

Therefore, the second inorganic insulating film 119 is preferably formedso that a gas from the organic insulating film 117 is released upwards(in the direction opposite to that of the transistor 150). Specifically,the edge portion of the second inorganic insulating film 119 ispreferably in a region which overlaps with the organic insulating film117. When the edge portion of the second inorganic insulating film 119is in the region which overlaps with the organic insulating film 117,the entire surface of the organic insulating film 117 is not coveredwith the inorganic insulating film 113 and the second inorganicinsulating film 119, and thus the organic insulating film 117 has anexposed portion from which a released gas from the organic insulatingfilm 117 is released.

Here, the exposed portion of the organic insulating film 117 means aregion of the organic insulating film 117 which does not overlap with atleast the second inorganic insulating film 119. When the organicinsulating film 117 has an exposed portion, a released gas from theorganic insulating film 117 can be released upwards, so that an impuritycan be prevented from entering the transistor 150.

Note that although the exposed region of the organic insulating film 117may be provided in any place in the pixel portion 1000, because a gasreleased from the organic insulating film 117 contains an impurity suchas hydrogen, the exposed region of the organic insulating film 117 ispreferably provided so that a gas released from the organic insulatingfilm 117 does not enter the transistor 150 side.

For example, the organic insulating film 117 may at least partly havethe exposed region in a region of the organic insulating film 117 whichoverlaps with the transistor 150. For example, the organic insulatingfilm 117 may be exposed in a region which overlaps with part of thesource electrode layer 111 a or the drain electrode layer 111 b of thetransistor 150. Alternatively, at least part of the organic insulatingfilm 117 may be exposed in a region where the organic insulating film117 and the semiconductor layer 109 overlap with each other.

Further, the exposed region of the organic insulating film 117 may beformed on a surface of the organic insulating film 117, which does notface the semiconductor layer 109, so that a gas from the organicinsulating film 117 is released from the surface opposite to a surfaceof the organic insulating film 117, which faces the semiconductor layer109 included in the transistor 150. Alternatively, it is preferable thatthe surface of the organic insulating film 117 which does not face thesemiconductor layer 109 (e.g. a region in contact with the liquidcrystal layer 125 in FIG. 1B) have more exposed regions than the surfaceof the organic insulating film 117 which faces the semiconductor layer109.

Further alternatively, the following structure may be employed: theorganic insulating film 117 and the sealant 1001 (not illustrated) arenot in contact with each other, and a side surface of the organicinsulating film 117 has an exposed region without formation of aninsulating layer, a transparent conductive layer, or the like so that areleased gas can be released from the side surface of the organicinsulating film 117 (a surface facing the sealant 1001). Note that anedge portion of the organic insulating film 117 may be covered with thesecond inorganic insulating film 119.

In the display device described in this embodiment, the exposed portionof the organic insulating film is provided over the transistor so that agas released from the organic insulating film which is provided over thetransistor does not enter the transistor side. The exposed portion isthe region which does not overlap with the inorganic insulating filmwhich is formed over the organic insulating film. Since the inorganicinsulating film is formed so as not to be in contact with the exposedportion, a gas from the organic insulating film can be released from theexposed portion. Accordingly, a gas containing an impurity such ashydrogen which is released from the organic insulating film can beprevented from entering the oxide semiconductor layer, andcharacteristics of the transistor can be prevented from varying, so thata display device having high display quality and high reliability can beobtained.

The transistor 150 includes the gate electrode layer 105 over the firstsubstrate 101.

It is necessary that the first substrate 101 at least have heatresistance sufficient to withstand heat treatment to be performed later.For example, a glass substrate of barium borosilicate glass,aluminoborosilicate glass, or the like, a ceramic substrate, a quartzsubstrate, or a sapphire substrate can be used.

Note that the first substrate 101 is preferably made to shrink (alsoreferred to as thermally shrink) by heat treatment performed in advanceat a temperature lower than a strain point of the first substrate 101,whereby the amount of shrinkage caused in the first substrate 101 by theheat treatment performed in the manufacturing process of the displaydevice can be suppressed. Accordingly, for example, misalignment of apattern in a light exposure step or the like can be suppressed. Inaddition, moisture, organic substances, and the like, which are attachedto the surface of the first substrate 101, can be removed by the heattreatment.

Further, a substrate in which an insulating layer is formed over asingle crystal semiconductor substrate or a polycrystallinesemiconductor substrate made of silicon, silicon carbide, or the like,or a compound semiconductor substrate made of silicon germanium or thelike, can also be used.

The gate electrode layer 105 can be formed using a metal elementselected from aluminum, chromium, copper, tantalum, titanium,molybdenum, and tungsten; an alloy containing any of these metalelements as a component; an alloy containing any of these metal elementsin combination; or the like. Further, one or more metal elementsselected from manganese and zirconium may be used. Furthermore, the gateelectrode layer 105 may have a single-layer structure or a stacked-layerstructure of two or more layers. For example, a single-layer structureof an aluminum film containing silicon, a two-layer structure in which atitanium film is stacked over an aluminum film, a two-layer structure inwhich a titanium film is stacked over a titanium nitride film, atwo-layer structure in which a tungsten film is stacked over a titaniumnitride film, a two-layer structure in which a tungsten film is stackedover a tantalum nitride film or a tungsten nitride film, a three-layerstructure in which a titanium film, an aluminum film, and a titaniumfilm are stacked in this order, and the like can be given.Alternatively, a film, an alloy film, or a nitride film which containsaluminum and one or more elements selected from titanium, tantalum,tungsten, molybdenum, chromium, neodymium, and scandium may be used.

In order to reduce the resistance of the gate electrode layer 105 andensure sufficient heat resistance thereof, the following structure maybe employed: a film of a high-melting-point metal such as titanium,molybdenum, or tungsten, or a nitride film of any of these metals (atitanium nitride film, a molybdenum nitride film, or a tungsten nitridefilm) is stacked either or both of over and under a metal film ofaluminum, copper, or the like, which has low resistivity.

The gate electrode layer 105 can also be formed using alight-transmitting conductive material such as indium tin oxide, indiumoxide containing tungsten oxide, indium zinc oxide containing tungstenoxide, indium oxide containing titanium oxide, indium tin oxidecontaining titanium oxide, indium zinc oxide, or indium tin oxide towhich silicon oxide is added. It is also possible to have astacked-layer structure formed using the above light-transmittingconductive material and the above metal element.

Further, an In—Ga—Zn-based oxynitride semiconductor film, an In—Sn-basedoxynitride semiconductor film, an In—Ga-based oxynitride semiconductorfilm, an In—Zn-based oxynitride semiconductor film, a Sn-basedoxynitride semiconductor film, an In-based oxynitride semiconductorfilm, a film of a metal nitride (such as InN or ZnN), or the like may beprovided between the gate electrode layer 105 and the gate insulatinglayer 107. These films each have a work function higher than or equal to5 eV, preferably higher than or equal to 5.5 eV, which is higher thanthe electron affinity of the oxide semiconductor. Thus, the thresholdvoltage of the transistor including an oxide semiconductor can beshifted in the positive direction, and a so-called normally-offswitching element can be achieved. For example, in the case of using anIn—Ga—Zn-based oxynitride semiconductor film, an In—Ga—Zn-basedoxynitride semiconductor film having a nitrogen concentration higherthan at least that of the oxide semiconductor film, specifically, anIn—Ga—Zn-based oxynitride semiconductor film having a nitrogenconcentration of 7 at. % or higher is used.

The gate insulating layer 107 may be formed with a single layer or astack using, for example, one or more of silicon oxide, siliconoxynitride, silicon nitride oxide, silicon nitride, aluminum oxide,hafnium oxide, gallium oxide, a Ga—Zn-based metal oxide, and the like.

Further, the gate insulating layer 107 is in contact with an oxidesemiconductor; therefore, the gate insulating layer 107 is preferably afilm in which the hydrogen concentration is reduced and which suppressesentry of hydrogen into the oxide semiconductor and can supply oxygen tooxygen vacancies in the oxide semiconductor. For example, a film whichsupplies oxygen preferably includes, in the film (bulk), an amount ofoxygen which exceeds at least the amount of oxygen in the stoichiometriccomposition. For example, in the case where a silicon oxide film is usedas the gate insulating layer 107, the composition formula of the gateinsulating layer 107 is SiO_(2+α) (α>0).

From an insulating film including oxygen whose amount exceeds the amountof oxygen in the stoichiometric composition, part of the oxygen isreleased by heating. Thus, when the insulating film from which part ofoxygen is released by heating is provided as the gate insulating layer107, oxygen is supplied to the oxide semiconductor, so that oxygenvacancies in the oxide semiconductor can be filled.

With use of a film from which oxygen is released by heating as the gateinsulating layer 107, interface state density at the interface betweenthe oxide semiconductor film and the gate insulating layer 107 can bereduced. Thus, a transistor with less deterioration in electriccharacteristics can be obtained. Further, when an insulating film havinga blocking effect against oxygen, hydrogen, water, and the like isprovided as the gate insulating layer 107, oxygen can be prevented fromdiffusing from the oxide semiconductor film to the outside, andhydrogen, water, and the like can be prevented from entering the oxidesemiconductor film from the outside. As the insulating film having ablocking effect against oxygen, hydrogen, water, and the like, analuminum oxide film, an aluminum oxynitride film, a gallium oxide film,a gallium oxynitride film, a yttrium oxide film, a yttrium oxynitridefilm, a hafnium oxide film, a hafnium oxynitride film, or the like canbe given.

The gate insulating layer 107 may be formed using a high-k material suchas hafnium silicate (HfSiO_(x)), hafnium silicate to which nitrogen isadded (HfSi_(x)O_(y)N_(z)), hafnium aluminate to which nitrogen is added(HfAl_(x)O_(y)N_(z)), hafnium oxide, or yttrium oxide, so that gateleakage current of the transistor can be reduced.

The thickness of the gate insulating layer 107 is preferably greaterthan or equal to 5 nm and less than or equal to 400 nm, more preferablygreater than or equal to 10 nm and less than or equal to 300 nm, stillmore preferably greater than or equal to 50 nm and less than or equal to250 nm.

The gate insulating layer 107 has a stacked-layer structure in which thefollowing layers each formed using a PECVD apparatus are stacked fromthe gate electrode layer side: a 50-nm-thick silicon nitride layer as afirst gate insulating layer having an effect of preventing a metalcomponent contained in the gate electrode layer 105 from diffusing; a300-nm-thick silicon nitride layer as a second gate insulating layerhaving an excellent dielectric strength voltage; a 50-nm-thick siliconnitride layer as a third gate insulating layer having a high blockingproperty against hydrogen; and a 50-nm-thick silicon oxynitride layer asa fourth gate insulating layer having an effect of reducing theinterface state density.

Further, in the case where an oxide semiconductor is used for thesemiconductor layer 109, an oxide insulator from which oxygen isreleased by heating may be used for the inorganic insulating film 113,like the gate insulating layer 107. Furthermore, after formation of theinorganic insulating film 113 over the oxide semiconductor, oxygen isintroduced to the oxide semiconductor layer by heating, whereby oxygenvacancies in the oxide semiconductor layer can be filled. Consequently,the amount of oxygen vacancies in the oxide semiconductor layer can bereduced.

An oxide semiconductor used for the semiconductor layer 109 preferablycontains at least indium (In) or zinc (Zn). Alternatively, the oxidesemiconductor preferably contains both In and Zn. In order to reduce avariation in the electrical characteristics of the transistor includingthe oxide semiconductor, the oxide semiconductor preferably contains astabilizer in addition to In and/or Zn.

As a stabilizer, gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al),zirconium (Zr), and the like can be given. As another stabilizer,lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr),neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium(Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm),ytterbium (Yb), or lutetium (Lu) can be given. The oxide semiconductorpreferably contains one or more of the above-described stabilizers.

As the oxide semiconductor, for example, any of the following can beused: indium oxide, tin oxide, zinc oxide, an In—Zn oxide, a Sn—Znoxide, an Al—Zn oxide, a Zn—Mg oxide, a Sn—Mg oxide, an In—Mg oxide, anIn—Ga oxide, an In—Ga—Zn oxide, an In—Al—Zn oxide, an In—Sn—Zn oxide, anSn—Ga—Zn oxide, an Al—Ga—Zn oxide, an Sn—Al—Zn oxide, an In—Hf—Zn oxide,an In—La—Zn oxide, an In—Ce—Zn oxide, an In—Pr—Zn oxide, an In—Nd—Znoxide, an In—Sm—Zn oxide, an In—Eu—Zn oxide, an In—Gd—Zn oxide, anIn—Tb—Zn oxide, an In—Dy—Zn oxide, an In—Ho—Zn oxide, an In—Er—Zn oxide,an In—Tm—Zn oxide, an In—Yb—Zn oxide, an In—Lu—Zn oxide, an In—Sn—Ga—Znoxide, an In—Hf—Ga—Zn oxide, an In—Al—Ga—Zn oxide, an In—Sn—Al—Zn oxide,an In—Sn—Hf—Zn oxide, and an In—Hf—Al—Zn oxide.

Note that here, for example, an “In—Ga—Zn oxide” means an oxideincluding In, Ga, and Zn as main components and there is no limitationon the ratio of In, Ga, and Zn. The In—Ga—Zn oxide may contain a metalelement other than the In, Ga, and Zn.

Alternatively, a material represented by InMO₃(ZnO)_(m) (m>0 issatisfied, and m is not an integer) may be used as the oxidesemiconductor. Note that M represents one or more metal elementsselected from Ga, Fe, Mn, and Co. Alternatively, as the oxidesemiconductor, a material represented by a chemical formula,In₂SnO₅(ZnO)_(n) (n>0, n is an integer) may be used.

For example, an In—Ga—Zn oxide with an atomic ratio of In:Ga:Zn=1:1:1,In:Ga:Zn=2:2:1, or In:Ga:Zn=3:1:2, or any of oxides whose composition isin the neighborhood of the above compositions can be used.Alternatively, an In—Sn—Zn oxide with an atomic ratio of In:Sn:Zn=1:1:1,In:Sn:Zn=2:1:3, or In:Sn:Zn=2:1:5, or any of oxides whose composition isin the neighborhood of the above compositions may be used.

However, without limitation to the materials given above, a materialwith an appropriate composition may be used in accordance with neededsemiconductor characteristics and electric characteristics (e.g.,field-effect mobility, the threshold voltage, and variation). In orderto obtain needed semiconductor characteristics, it is preferred that thecarrier density, the impurity concentration, the defect density, theatomic ratio between metal elements and oxygen, the interatomic distance(bond distance), the density, and the like be set appropriately.

For example, high mobility can be obtained relatively easily in the caseof using an In—Sn—Zn oxide. However, mobility can be increased byreducing the defect density in a bulk also in the case of using anIn—Ga—Zn oxide.

Further, an oxide semiconductor having an energy gap larger than orequal to 2 eV, preferably larger than or equal to 2.5 eV, morepreferably larger than or equal to 3 eV is used for an oxidesemiconductor film used for the semiconductor layer 109. In this manner,the off-state current of a transistor can be reduced by using an oxidesemiconductor having a wide energy gap.

A structure of an oxide semiconductor film is described below.

In this specification, a term “parallel” indicates that the angle formedbetween two straight lines is greater than or equal to −10° and lessthan or equal to 10°, and accordingly also includes the case where theangle is greater than or equal to −5° and less than or equal to 5°. Inaddition, a term “perpendicular” indicates that the angle formed betweentwo straight lines is greater than or equal to 80° and less than orequal to 100°, and accordingly includes the case where the angle isgreater than or equal to 85° and less than or equal to 95°.

In this specification, the trigonal and rhombohedral crystal systems areincluded in the hexagonal crystal system.

An oxide semiconductor film is classified roughly into anon-single-crystal oxide semiconductor film and a single-crystal oxidesemiconductor film. The non-single-crystal oxide semiconductor filmincludes any of a c-axis aligned crystalline oxide semiconductor(CAAC-OS) film, a polycrystalline oxide semiconductor film, amicrocrystalline oxide semiconductor film, an amorphous oxidesemiconductor film, and the like.

Further, a CAAC-OS film including crystal parts can be preferably usedas the semiconductor layer 109.

The CAAC-OS film is one of oxide semiconductor films including aplurality of crystal parts, and most of each crystal part fits inside acube whose one side is less than 100 nm. Thus, there is a case where acrystal part included in the CAAC-OS film fits inside a cube whose oneside is less than 10 nm, less than 5 nm, or less than 3 nm.

In a transmission electron microscope (TEM) image of the CAAC-OS film, aboundary between crystal parts, that is, a grain boundary is not clearlyobserved. Thus, in the CAAC-OS film, a reduction in electron mobilitydue to the grain boundary is less likely to occur.

According to the TEM image of the CAAC-OS film observed in a directionsubstantially parallel to a sample surface (cross-sectional TEM image),metal atoms are arranged in a layered manner in the crystal parts. Eachmetal atom layer has a morphology reflected by a surface over which theCAAC-OS film is formed (hereinafter, a surface over which the CAAC-OSfilm is formed is referred to as a formation surface) or a top surfaceof the CAAC-OS film, and is arranged in parallel to the formationsurface or the top surface of the CAAC-OS film.

On the other hand, according to the TEM image of the CAAC-OS filmobserved in a direction substantially perpendicular to the samplesurface (plan TEM image), metal atoms are arranged in a triangular orhexagonal configuration in the crystal parts. However, there is noregularity of arrangement of metal atoms between different crystalparts.

From the results of the cross-sectional TEM image and the plan TEMimage, alignment is found in the crystal parts in the CAAC-OS film.

A CAAC-OS film is subjected to structural analysis with an X-raydiffraction (XRD) apparatus. For example, when the CAAC-OS filmincluding an InGaZnO₄ crystal is analyzed by an out-of-plane method, apeak appears frequently when the diffraction angle (2θ) is around 31°.This peak is derived from the (009) plane of the InGaZnO₄ crystal, whichindicates that crystals in the CAAC-OS film have c-axis alignment, andthat the c-axes are aligned in a direction substantially perpendicularto the formation surface or the top surface of the CAAC-OS film.

On the other hand, when the CAAC-OS film is analyzed by an in-planemethod in which an X-ray enters a sample in a direction perpendicular tothe c-axis, a peak appears frequently when 2θ is around 56°. This peakis derived from the (110) plane of the InGaZnO₄ crystal. Here, analysis(ϕ scan) is performed under conditions where the sample is rotatedaround a normal vector of a sample surface as an axis (ϕ axis) with 2θfixed at around 56°. In the case where the sample is a single-crystaloxide semiconductor film of InGaZnO₄, six peaks appear. The six peaksare derived from crystal planes equivalent to the (110) plane. On theother hand, in the case of a CAAC-OS film, a peak is not clearlyobserved even when ϕ scan is performed with 2θ fixed at around 56°.

According to the above results, in the CAAC-OS film having c-axisalignment, while the directions of a-axes and b-axes are differentbetween crystal parts, the c-axes are aligned in a direction parallel toa normal vector of a formation surface or a normal vector of a topsurface. Thus, each metal atom layer arranged in a layered mannerobserved in the cross-sectional TEM image corresponds to a planeparallel to the a-b plane of the crystal.

Note that the crystal part is formed concurrently with deposition of theCAAC-OS film or is formed through crystallization treatment such as heattreatment. As described above, the c-axis of the crystal is aligned witha direction parallel to a normal vector of a formation surface or anormal vector of a top surface of the CAAC-OS film. Thus, for example,in the case where a shape of the CAAC-OS film is changed by etching orthe like, the c-axis might not be necessarily parallel to a normalvector of a formation surface or a normal vector of a top surface of theCAAC-OS film.

Further, the degree of crystallinity in the CAAC-OS film is notnecessarily uniform. For example, in the case where crystal growthleading to the CAAC-OS film occurs from the vicinity of the top surfaceof the film, the degree of the crystallinity in the vicinity of the topsurface is higher than that in the vicinity of the formation surface insome cases. Further, when an impurity is added to the CAAC-OS film, thecrystallinity in a region to which the impurity is added is changed, andthe degree of crystallinity in the CAAC-OS film varies depending onregions.

Note that when the CAAC-OS film with an InGaZnO₄ crystal is analyzed byan out-of-plane method, a peak of 2θ may also be observed at around 36°,in addition to the peak of 2θ at around 31°. The peak of 2θ at around36° indicates that a crystal having no c-axis alignment is included inpart of the CAAC-OS film. It is preferable that in the CAAC-OS film, apeak of 2θ appear at around 31° and a peak of 2θ do not appear at around36°.

The CAAC-OS film is an oxide semiconductor film having a low impurityconcentration. The impurity means an element other than main componentsof the oxide semiconductor film, such as hydrogen, carbon, silicon, or atransition metal element. In particular, an element (e.g., silicon)having higher strength of bonding to oxygen than a metal elementincluded in the oxide semiconductor film takes oxygen away in the oxidesemiconductor film to disrupt the atomic arrangement in the oxidesemiconductor film, which causes a lowering of the crystallinity of theoxide semiconductor film. A heavy metal such as iron or nickel, argon,carbon dioxide, or the like has a large atomic radius (or molecularradius), and thus disrupts the atomic arrangement in the oxidesemiconductor film when included in the oxide semiconductor film, whichcauses a lowering of the crystallinity of the oxide semiconductor film.Note that the impurity included in the oxide semiconductor film servesas a carrier trap or a carrier generation source in some cases.

The CAAC-OS film is an oxide semiconductor film having a low density ofdefect states. For example, oxygen vacancies in the oxide semiconductorfilm serve as carrier traps or serve as carrier generation sources whenhydrogen is captured therein.

The state in which impurity concentration is low and density of defectstates is low (the number of oxygen vacancies is small) is referred toas “highly purified intrinsic” or “substantially highly purifiedintrinsic”. A highly purified intrinsic or substantially highly purifiedintrinsic oxide semiconductor film has few carrier generation sources,and thus has a low carrier density. Thus, a transistor including theoxide semiconductor film rarely has a negative threshold voltage (israrely normally-on). A highly purified intrinsic or substantially highlypurified intrinsic oxide semiconductor film has few carrier traps. Thus,the transistor including the oxide semiconductor film has a smallvariation in electrical characteristics and accordingly has highreliability. Charges trapped by the carrier traps in the oxidesemiconductor film take a long time to be released and may behave likefixed charges. Thus, the transistor including the oxide semiconductorfilm with a high impurity concentration and a high density of defectstates has unstable electrical characteristics in some cases.

With the use of the CAAC-OS film in a transistor, a variation in theelectrical characteristics of the transistor due to irradiation withvisible light or ultraviolet light is small.

Next, a microcrystalline oxide semiconductor film which can be used asthe semiconductor layer 109 will be described.

In an image obtained with a TEM, crystal parts cannot be found clearlyin the microcrystalline oxide semiconductor film in some cases. In mostcases, the size of a crystal part included in the microcrystalline oxidesemiconductor film is greater than or equal to 1 nm and less than orequal to 100 nm, or greater than or equal to 1 nm and less than or equalto 10 nm. A microcrystal with a size greater than or equal to 1 nm andless than or equal to 10 nm, or a size greater than or equal to 1 nm andless than or equal to 3 nm is specifically referred to as nanocrystal(nc). An oxide semiconductor film including nanocrystal is referred toas an nc-OS (nanocrystalline oxide semiconductor) film. In an image ofthe nc-OS film obtained with a TEM, for example, a grain boundary is notclearly detected in some cases.

In the nc-OS film, a microscopic region (for example, a region with asize greater than or equal to 1 nm and less than or equal to 10 nm, inparticular, a region with a size greater than or equal to 1 nm and lessthan or equal to 3 nm) has a periodic atomic order. However, there is noregularity of crystal orientation between different crystal parts in thenc-OS film; thus, the orientation of the whole film is not observed.Accordingly, in some cases, the nc-OS film cannot be distinguished froman amorphous oxide semiconductor depending on an analysis method. Forexample, when the nc-OS film is subjected to structural analysis by anout-of-plane method with an XRD apparatus using an X-ray having adiameter larger than that of a crystal part, a peak which shows acrystal plane does not appear. Further, a halo pattern is shown in aselected-area electron diffraction image of the nc-OS film obtained byusing an electron beam having a probe diameter (e.g., larger than orequal to 50 nm) larger than that of a crystal part. Meanwhile, spots areshown in a nanobeam electron diffraction image of the nc-OS filmobtained by using an electron beam having a probe diameter (e.g., largerthan or equal to 1 nm and smaller than or equal to 30 nm) close to, orsmaller than or equal to that of a crystal part. Further, in a nanobeamelectron diffraction image of the nc-OS film, regions with highluminance in a circular (ring) pattern are shown in some cases. Also ina nanobeam electron diffraction image of the nc-OS film, a plurality ofspots are shown in a ring-like region in some cases.

Since the nc-OS film is an oxide semiconductor film having moreregularity than the amorphous oxide semiconductor film, the nc-OS filmhas a lower density of defect states than the amorphous oxidesemiconductor film. However, there is no regularity of crystalorientation between different crystal parts in the nc-OS film; hence,the nc-OS film has a higher density of defect states than the CAAC-OSfilm.

Note that an oxide semiconductor film may be a stacked film includingtwo or more films of an amorphous oxide semiconductor film, amicrocrystalline oxide semiconductor film, and a CAAC-OS film, forexample.

In an oxide semiconductor having a crystal part such as the CAAC-OSfilm, defects in the bulk can be further reduced and when the surfaceflatness of the oxide semiconductor is improved, mobility higher thanthat of an oxide semiconductor in an amorphous state can be obtained. Inorder to improve the surface planarity, the oxide semiconductor ispreferably formed over a flat surface.

Note that since the transistor 150 described in this embodiment is abottom-gate transistor, the substrate 101, the gate electrode layer 105,and the gate insulating layer 107 are located below the oxidesemiconductor film. Accordingly, planarization treatment such as CMP(chemical mechanical polishing) treatment may be performed after theformation of the gate electrode layer 105 and the gate insulating layer107 to obtain the above flat surface.

Further, the oxide semiconductor film may have a structure in which aplurality of oxide semiconductor films is stacked. For example, theoxide semiconductor film may have a stacked-layer structure of a firstoxide semiconductor film and a second oxide semiconductor film which areformed using metal oxides with different compositions. For example, thefirst oxide semiconductor film may be formed using one of metal oxides,and the second oxide semiconductor film may be formed using a metaloxide different from the metal oxide used for the first oxidesemiconductor film.

Further, the constituent elements of the first oxide semiconductor filmand the second oxide semiconductor film may be the same but thecompositions of the constituent elements of the first oxidesemiconductor film and the second oxide semiconductor film may bedifferent from each other. For example, the first oxide semiconductorfilm may have an atomic ratio of In:Ga:Zn=1:1:1, and the second oxidesemiconductor film may have an atomic ratio of In:Ga:Zn=3:1:2.Alternatively, the first oxide semiconductor film may have an atomicratio of In:Ga:Zn=1:3:2, and the second oxide semiconductor film mayhave an atomic ratio of In:Ga:Zn=2:1:3.

At this time, one of the first oxide semiconductor film and the secondoxide semiconductor film which is closer to the gate electrode layer 105(on a channel side) preferably contains In and Ga at a proportion ofIn>Ga. The other which is farther from the gate electrode layer 105 (ona back channel side) preferably contains In and Ga at a proportion of InGa.

Further, the oxide semiconductor film may have a three-layer structureof the first oxide semiconductor film, the second oxide semiconductorfilm, and a third oxide semiconductor film, in which the constituentelements thereof are the same and the compositions of the first oxidesemiconductor film, the second oxide semiconductor film, and the thirdoxide semiconductor film are different from each other. For example, thefirst oxide semiconductor film may have an atomic ratio ofIn:Ga:Zn=1:3:2, the second oxide semiconductor film may have an atomicratio of In:Ga:Zn=3:1:2, and the third oxide semiconductor film may havean atomic ratio of In:Ga:Zn=1:1:1.

An oxide semiconductor film which contains less In than Ga and Zn atatomic ratio, typically, the first oxide semiconductor film having anatomic ratio of In:Ga:Zn=1:3:2, has a higher insulating property than anoxide semiconductor film which contains more In than Ga and Zn at atomicratio, typically, the second oxide semiconductor film, and an oxidesemiconductor film which contains Ga, Zn, and In at the same atomicratio, typically, the third oxide semiconductor film.

Since the constituent elements of the first oxide semiconductor film,the second oxide semiconductor film, and the third oxide semiconductorfilm are the same, the first oxide semiconductor film has fewer traplevels at the interface with the second oxide semiconductor film.Therefore, when the oxide semiconductor film has the above structure,the amount of change in the threshold voltage of the transistor due to achange over time or a stress test can be reduced.

In an oxide semiconductor, the s orbital of heavy metal mainlycontributes to carrier transfer, and when the In content in the oxidesemiconductor is increased, overlap of the s orbitals is likely to beincreased. Therefore, an oxide having a composition of In>Ga has highermobility than an oxide having a composition of In Ga. Further, in Ga,the formation energy of an oxygen vacancy is larger and thus an oxygenvacancy is less likely to occur, than in In; therefore, the oxide havinga composition of In Ga has more stable characteristics than the oxidehaving a composition of In>Ga.

An oxide semiconductor having a composition of In>Ga is used on achannel side, and an oxide semiconductor having a composition of In Gais used on a back channel side; so that field-effect mobility andreliability of a transistor can be further improved.

Further, when the semiconductor layer 109 is formed to have a stackedstructure, the first oxide semiconductor film, the second oxidesemiconductor film, and the third oxide semiconductor film may be formedusing oxide semiconductor films having different crystallinity. That is,the semiconductor layer 109 may be formed by combining a single crystaloxide semiconductor film, a polycrystalline oxide semiconductor film, anamorphous oxide semiconductor film, and a CAAC-OS film as appropriate.When an amorphous oxide semiconductor film is applied to any of thefirst oxide semiconductor film, the second oxide semiconductor film, andthe third oxide semiconductor film, internal stress or external stressof the oxide semiconductor film is relieved, a variation in thecharacteristics of a transistor is reduced, and reliability of thetransistor can be further improved.

The thickness of the oxide semiconductor film is preferably greater thanor equal to 1 nm and less than or equal to 100 nm, more preferablygreater than or equal to 1 nm and less than or equal to 50 nm, stillmore preferably greater than or equal to 1 nm and less than or equal to30 nm, further preferably greater than or equal to 3 nm and less than orequal to 20 nm.

The concentration of an alkali metal or an alkaline earth metal in theoxide semiconductor film, which is obtained by secondary ion massspectrometry (SIMS), is preferably lower than or equal to 1×10¹⁸atoms/cm³, more preferably lower than or equal to 2×10¹⁶ atoms/cm³. Thisis because an alkali metal and an alkaline earth metal are bonded to anoxide semiconductor and generate carriers in some cases and cause anincrease in off-state current of the transistor.

Further, the hydrogen concentration in the oxide semiconductor film,which is obtained by secondary ion mass spectrometry, is lower than5×10¹⁸ atoms/cm³, preferably lower than or equal to 1×10¹⁸ atoms/cm³,more preferably lower than or equal to 5×10¹⁷ atoms/cm³, still morepreferably lower than or equal to 1×10¹⁶ atoms/cm³.

Hydrogen contained in the oxide semiconductor film reacts with oxygenbonded to a metal atom to produce water, and a defect is formed in alattice from which oxygen is released (or a portion from which oxygen isremoved). In addition, a bond of part of hydrogen and oxygen causesgeneration of electrons serving as carrier. Thus, the impuritiescontaining hydrogen are reduced as much as possible in the step offorming the oxide semiconductor film, whereby the hydrogen concentrationin the oxide semiconductor film can be reduced. When a channel formationregion is formed in an oxide semiconductor film which is highly purifiedby removing hydrogen as much as possible, a shift of the thresholdvoltage in the negative direction can be reduced, and the leakagecurrent between a source and a drain of the transistor (typically, theoff-state current or the like) can be decreased to several yA/μm toseveral zA/μm. As a result, electric characteristics of the transistorcan be improved.

The oxide semiconductor film is formed by a sputtering method, a coatingmethod, a pulsed laser deposition method, a laser ablation method, orthe like.

In the case where the oxide semiconductor film is formed by a sputteringmethod, a power supply device for generating plasma can be an RF powersupply device, an AC power supply device, a DC power supply device, orthe like as appropriate.

As a sputtering gas, a rare gas (typically argon), oxygen, or a mixedgas of a rare gas and oxygen is used as appropriate. In the case ofusing the mixed gas of a rare gas and oxygen, the proportion of oxygenis preferably higher than that of a rare gas.

Further, a target may be appropriately selected in accordance with thecomposition of the oxide semiconductor film to be formed.

When a CAAC-OS film is formed, for example, the CAAC-OS film is formedby a sputtering method with a polycrystalline oxide semiconductortarget. By collision of ions with the target, a crystal region includedin the target may be separated from the target along an a-b plane; inother words, a sputtered particle having a plane parallel to an a-bplane (flat-plate-like sputtered particle or pellet-like sputteredparticle) may flake off from the target. In that case, theflat-plate-like sputtered particle reaches a substrate while maintainingtheir crystal state, whereby the CAAC-OS film can be formed.

For the deposition of the CAAC-OS film, the following conditions arepreferably used.

By reducing the amount of impurities entering the CAAC-OS film duringthe deposition, the crystal state can be prevented from being broken bythe impurities. For example, the concentration of impurities (e.g.,hydrogen, water, carbon dioxide, or nitrogen) which exist in adeposition chamber may be reduced. Furthermore, the concentration ofimpurities in a deposition gas may be reduced. Specifically, adeposition gas whose dew point is −80° C. or lower, preferably −100° C.or lower is used.

By increasing the substrate heating temperature during the deposition,migration of a sputtered particle occurs after the sputtered particlereaches the substrate. Specifically, the substrate heating temperatureduring the deposition is higher than or equal to 100° C. and lower thanor equal to 740° C., preferably higher than or equal to 200° C. andlower than or equal to 500° C. By increasing the substrate heatingtemperature during the deposition, when the flat-plate-like sputteredparticle reaches the substrate, migration occurs on the substratesurface, so that a flat plane of the flat-plate-like sputtered particleis attached to the substrate.

Furthermore, it is preferable that the proportion of oxygen in thedeposition gas be increased and the power be optimized in order toreduce plasma damage at the deposition. The proportion of oxygen in thedeposition gas is 30 vol % or higher, preferably 100 vol %.

As an example of the target, an In—Ga—Zn oxide target is describedbelow.

The In—Ga—Zn oxide target, which is polycrystalline, is made by mixingInO_(X) powder, GaO_(Y) powder, and ZnO_(Z) powder in a predeterminedmolar ratio, applying pressure, and performing heat treatment at atemperature higher than or equal to 1000° C. and lower than or equal to1500° C. Note that X, Y, and Z are each a given positive number. Here,the predetermined molar ratio of InO_(X) powder to GaO_(Y) powder andZnO_(Z) powder is, for example, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or3:1:2. The kinds of powder and the molar ratio for mixing powder may bedetermined as appropriate depending on the desired target.

After the oxide semiconductor film is formed, heat treatment may beperformed so that the oxide semiconductor film is dehydrated ordehydrogenated. The temperature of the heat treatment is typicallyhigher than or equal to 150° C. and lower than the strain point of thesubstrate, preferably higher than or equal to 250° C. and lower than orequal to 450° C., more preferably higher than or equal to 300° C. andlower than or equal to 450° C.

The heat treatment is performed under an inert gas atmosphere containingnitrogen or a rare gas such as helium, neon, argon, xenon, or krypton.Alternatively, the heat treatment may be performed under an inert gasatmosphere first, and then under an oxygen atmosphere. It is preferablethat the above inert gas atmosphere and the above oxygen atmosphere donot contain hydrogen, water, and the like. The treatment time is 3minutes to 24 hours.

By performing heat treatment after the oxide semiconductor film isformed, in the oxide semiconductor film, the hydrogen concentration canbe less than 5×10¹⁸ atoms/cm³, preferably less than or equal to 1×10¹⁸atoms/cm³, more preferably less than or equal to 5×10¹⁷ atoms/cm³, stillmore preferably less than or equal to 1×10¹⁶ atoms/cm³.

Note that in the case where an oxide insulating layer is used as thegate insulating layer 107, when heat treatment is performed while theoxide semiconductor film is provided over the oxide insulating layer,oxygen can be supplied to the oxide semiconductor film, the oxygendefects in the oxide semiconductor film can be reduced, andsemiconductor characteristics can be improved. The oxide semiconductorfilm and the oxide insulating layer may be subjected to a heating stepin a state where the oxide semiconductor film and the oxide insulatinglayer are at least partly in contact with each other so that oxygen issupplied to the oxide semiconductor film.

The source electrode layer and the drain electrode layer which areprovided over the semiconductor layer 109 can be formed using a materialand a method similar to those of the gate electrode layer 105.

In this embodiment, the source electrode layer 111 a and the drainelectrode layer 111 b are formed in such a manner that after a50-nm-thick titanium film, a 400-nm-thick aluminum film, and a100-nm-thick titanium film are stacked in this order using a sputteringapparatus, a resist mask is formed over the titanium film by aphotolithography method, and part of the stacked film including thetitanium film, the aluminum film, and the titanium film is selectivelyremoved using the resist mask.

As a liquid crystal material used for the liquid crystal layer 125 overthe capacitor 170, a thermotropic liquid crystal, a low-molecular liquidcrystal, a high-molecular liquid crystal, a polymer dispersed liquidcrystal, a ferroelectric liquid crystal, an anti-ferroelectric liquidcrystal, or the like can be used. Such a liquid crystal material (liquidcrystal composition) exhibits a cholesteric phase, a smectic phase, acubic phase, a chiral nematic phase, an isotropic phase, or the likedepending on conditions. Further, although not illustrated in FIGS. 1Aand 1B, insulating films each of which serves as an alignment film andbetween which a layer containing any of these materials is interposed, aspacer which controls a distance (cell gap) between the transparentconductive layer 123 and the transparent conductive layer 127, or thelike may be provided in the liquid crystal layer 125. Further, thealignment film can be formed using an organic material having heatresistance, such as an acrylic-based resin, a polyimide-based resin, abenzocyclobutene-based resin, a polyamide-based resin, or an epoxy-basedresin.

Alternatively, a liquid crystal composition exhibiting a blue phase forwhich an alignment film is not used may be used for the liquid crystallayer 125. A blue phase is one of liquid crystal phases, which isgenerated just before a cholesteric phase changes into an isotropicphase while temperature of cholesteric liquid crystal is increased. Theblue phase can be exhibited using a liquid crystal composition which isa mixture of a liquid crystal and a chiral material. In order toincrease the temperature range where the blue phase is exhibited, aliquid crystal layer may be formed by adding a polymerizable monomer, apolymerization initiator, and the like to a liquid crystal compositionexhibiting a blue phase and by performing polymer stabilizationtreatment. The liquid crystal composition exhibiting a blue phase has ashort response time, and has optical isotropy, which contributes to theexclusion of the alignment process and reduction of viewing angledependence. In addition, since an alignment film does not need to beprovided and rubbing treatment is unnecessary, electrostatic dischargedamage caused by the rubbing treatment can be prevented and defects anddamage of a liquid crystal display device can be reduced in themanufacturing process. Thus, productivity of the liquid crystal displaydevice can be increased. A transistor including an oxide semiconductorfilm has a possibility that the electric characteristics of thetransistor may vary significantly by the influence of static electricityand deviate from the designed range. Therefore, it is more effective touse a liquid crystal composition exhibiting a blue phase for the liquidcrystal display device including the transistor formed using an oxidesemiconductor film.

The specific resistivity of the liquid crystal material is greater thanor equal to 1×10⁹ Ω·cm, preferably greater than or equal to 1×10¹¹ Ω·cm,more preferably greater than or equal to 1×10¹² Ω·cm. Note that thespecific resistivity in this specification is measured at 20° C.

For a driving method of the liquid crystal layer 125, a TN (twistednematic) mode, an IPS (in-plane-switching) mode, an FFS (fringe fieldswitching) mode, an ASM (axially symmetric aligned micro-cell) mode, anOCB (optical compensated birefringence) mode, an FLC (ferroelectricliquid crystal) mode, an AFLC (antiferroelectric liquid crystal) mode,or the like can be used.

A normally black liquid crystal display device such as a transmissiveliquid crystal display device utilizing a vertical alignment (VA) modemay be used. Some examples are given as the vertical alignment mode. Forexample, a multi-domain vertical alignment (MVA) mode, a patternedvertical alignment (PVA) mode, or an advanced super view (ASV) mode canbe used. Furthermore, this embodiment can be applied to a VA liquidcrystal display device. The VA liquid crystal display device has a kindof form in which alignment of liquid crystal molecules of a liquidcrystal display panel is controlled. In the VA liquid crystal displaydevice, liquid crystal molecules are aligned in a vertical directionwith respect to a panel surface when no voltage is applied. Moreover, itis possible to use a method called domain multiplication or multi-domaindesign, in which a pixel is divided into some regions (subpixels) andmolecules are aligned in different directions in their respectiveregions.

In the display device, a black matrix (a light-blocking layer), anoptical member (an optical substrate) such as a polarizing member, aretardation member, or an anti-reflection member, and the like areprovided as appropriate. For example, circular polarization may beobtained by using a polarizing substrate and a retardation substrate. Inaddition, a backlight, a side light, or the like may be used as a lightsource.

As a display method in the pixel portion, a progressive method, aninterlace method or the like can be employed. Further, color elementscontrolled in a pixel at the time of color display are not limited tothree colors: R, G, and B (R, G, and B correspond to red, green, andblue, respectively). For example, R, G, B, and W (W corresponds towhite); R, G, B, and one or more of yellow, cyan, magenta, and the like;or the like can be used. Further, the sizes of display regions may bedifferent between respective dots of color elements. Note that oneembodiment of the disclosed invention is not limited to the applicationto a display device for color display; the disclosed invention can alsobe applied to a display device for monochrome display.

FIGS. 1A and 1B illustrate a structure in which the alignment of theliquid crystal layer 125 is controlled by the transparent conductivelayer 123 and the transparent conductive layer 127. Accordingly, inFIGS. 1A and 1B, the transparent conductive layer 123 serves as a pixelelectrode, and the transparent conductive layer 127 serves as a commonelectrode. FIGS. 5A and 5B illustrate a structure in which the alignmentof the liquid crystal layer 125 is controlled in accordance with theelectric field generated between the transparent conductive layer 121and the transparent conductive layer 123 included in a capacitor 180.Accordingly, in FIGS. 5A and 5B, the transparent conductive layer 121serves as a common electrode, and the transparent conductive layer 123serves as a pixel electrode.

Note that the structure of the display device described in thisembodiment is not limited to the structure illustrated in FIGS. 1A and1B and may be the structure illustrated in FIGS. 5A and 5B.

FIGS. 5A and 5B illustrate part of a pixel included in a display deviceof another embodiment of the present invention. FIG. 5A is a top viewillustrating part of the pixel included in the display device of anotherembodiment of the present invention, and FIG. 5B is a cross-sectionalview taken along dashed-dotted line C-D in FIG. 5A. Note that in FIGS.5A and 5B, the same parts as those in FIGS. 1A and 1B are denoted by thesame reference numerals and not detailed.

The structure illustrated in FIGS. 5A and 5B is different from thestructures illustrated in FIGS. 2A to 2C in that a second inorganicinsulating film 129 part of which is used as a dielectric of thecapacitor 180 overlaps with the drain electrode layer 111 b of thetransistor 150. With such a structure, the second inorganic insulatingfilm 129 and the inorganic insulating film 115 are in contact with eachother and can surround the organic insulating film 117, so that a gasreleased from the organic insulating film 117 can be prevented fromdiffusing into the transistor 150 side.

In the display device described in this embodiment, the exposed regionis provided in the organic insulating film which is located on the sideopposite to that of the transistor so that a gas released from theorganic insulating film which is provided over the transistor does notenter the transistor side. The exposed portion is the region which doesnot overlap with the inorganic insulating film over the organicinsulating film. Since the inorganic insulating film is formed so as notto be in contact with the exposed portion, a gas from the organicinsulating film can be released from the exposed portion. Accordingly, agas containing an impurity such as hydrogen, which is released from theorganic insulating film, can be prevented from entering the oxidesemiconductor layer, and characteristics of the transistor can beprevented from varying, so that a display device having high displayquality and high reliability can be obtained.

This embodiment can be implemented in appropriate combination with thestructures described in the other embodiments.

Embodiment 2

In this embodiment, an image sensor that can be used in combination withany of the display devices described in the above embodiment isdescribed.

An example of a display device with an image sensor is illustrated inFIG. 6A. FIG. 6A illustrates an equivalent circuit of a pixel of thedisplay device with an image sensor.

One electrode of a photodiode element 4002 is electrically connected toa reset signal line 4058, and the other electrode of the photodiodeelement 4002 is electrically connected to a gate electrode of atransistor 4040. One of a source electrode and a drain electrode of thetransistor 4040 is electrically connected to a power supply potential(VDD), and the other of the source electrode and the drain electrode ofthe transistor 4040 is electrically connected to one of a sourceelectrode and a drain electrode of a transistor 4056. A gate electrodeof the transistor 4056 is electrically connected to a gate selectionline 4057, and the other of the source electrode and the drain electrodeof the transistor 4056 is electrically connected to an output signalline 4071.

A first transistor 4030 is a transistor for pixel switching. One of asource electrode and a drain electrode of the first transistor 4030 iselectrically connected to a video signal line 4059, and the other of thesource electrode and the drain electrode of the first transistor 4030 iselectrically connected to a capacitor 4032 and a liquid crystal element4034. A gate electrode of the first transistor 4030 is electricallyconnected to a gate line 4036.

Note that structures of the first transistor 4030 and the capacitor 4032can be similar to those in the display device described in Embodiment 1.

FIG. 6B illustrates a cross section of part of a pixel of the displaydevice with an image sensor. In a pixel region, the photodiode element4002 and the transistor 4030 are provided over a substrate 4001.Further, in the pixel portion 5042, an inorganic insulating film 4020used as a dielectric of the capacitor 4032 is formed over an organicinsulating film 4016. In part of a region of the inorganic insulatingfilm 4020 which overlaps with the transistor 4030, an opening is formed.The organic insulating film 4016 has an exposed portion over which theinorganic insulating film is not formed.

With such a structure, a gas released from the organic insulating film4016 can be prevented from entering the transistor 4030 side, so that ahighly reliable display device can be obtained.

Note that the organic insulating film 4016 is provided over thephotodiode element 4002 and the transistor 4030. The inorganicinsulating film 4020 used as a dielectric of the capacitor 4032 isformed over the organic insulating film 4016 but is not provided overthe part of the region which overlaps with the transistor 4030.

With such a structure, a released gas from the organic insulating filmcan be prevented from diffusing into the transistor, so that a highlyreliable display device can be obtained.

In the photodiode element 4002, a lower electrode formed in the samestep as the source electrode and the drain electrode of the transistor4030 and an upper electrode formed in the same step as a pixel electrodeof the liquid crystal element 4034 are included as a pair of electrodes,and a diode is present between the pair of electrodes.

As a diode that can be used as the photodiode element 4002, a pn-typediode including a stack of a p-type semiconductor film and an n-typesemiconductor film, a pin-type diode including a stack of a p-typesemiconductor film, an i-type semiconductor film, and an n-typesemiconductor film, a Schottky diode, or the like can be used.

Over the photodiode element 4002, a first alignment film 4024, a liquidcrystal layer 4096, a second alignment film 4084, a counter electrode4088, an organic insulating film 4086, a colored film 4085, a countersubstrate 4052, and the like are provided.

In this embodiment, the display device includes the first alignment film4024 and the second alignment film 4084 between which the liquid crystallayer 4096 is interposed, unlike in Embodiment 1. For the firstalignment film 4024 and the second alignment film 4084, a heat-resistantorganic material such as an acrylic resin, a polyimide, abenzocyclobutene-based resin, a polyamide, or an epoxy resin can beused. The first alignment film 4024 is formed in contact with theorganic insulating film 4016 and thus is preferably a film through whicha gas from the organic insulating film 4016 is released.

Further, the alignment of the liquid crystal layer 4096 is controlled byvoltage applied to the counter electrode 4088 and transparent conductivelayers included in the capacitor 4032.

Note that a pin-type diode has better photoelectric conversioncharacteristics when the p-type semiconductor film side is used as alight-receiving plane. This is because the hole mobility is lower thanthe electron mobility. This embodiment shows an example in which lightwhich enters the photodiode element 4002 from a surface of the countersubstrate 4052 through the liquid crystal layer 4096 and the like isconverted into an electric signal, but this example does not limit thepresent invention. Alternatively, the colored film and the like may beprovided on the counter substrate side.

The photodiode element 4002 described in this embodiment utilizes flowof current between the pair of electrodes which is caused by entry oflight into the photodiode element 4002. When the photodiode element 4002detects light, information of an object to be detected can be read.

By performing, for example, a step of forming the transistor for thedisplay device and a step for the image sensor at the same time, theproductivity of the display device with the image sensor described inthis embodiment can be increased. However, any of the display devicesdescribed in the above embodiment and the image sensor described in thisembodiment may be fabricated over different substrates. Specifically,the image sensor may be fabricated over the second substrate in any ofthe display devices described in the above embodiment.

This embodiment can be implemented in appropriate combination with anyof the structures described in the other embodiments.

Embodiment 3

In this embodiment, an example of a tablet terminal using a displaydevice of one embodiment of the present invention is described.

FIGS. 7A and 7B illustrate a foldable tablet terminal. FIG. 7Aillustrates the tablet terminal which is unfolded. The tablet terminalincludes a housing 8630, and a display portion 8631 a, a display portion8631 b, a display mode switch 8034, a power switch 8035, a power-savingmode switch 8036, a clasp 8033, and an operation switch 8038 which areprovided on the housing 8630.

The whole or part of the display portion 8631 a can function as a touchpanel and data can be input when a displayed operation key is touched.For example, the display portion 8631 a can display keyboard buttons inthe whole region to function as a touch panel, and the display portion8631 b may be used as a display screen.

Like the display portion 8631 a, the whole or part of the displayportion 8631 b can function as a touch panel.

Further, a touch panel region of the display portion 8631 a and a touchpanel region of the display portion 8631 b can be touched for input atthe same time.

With the display mode switch 8034, the display can be switched between aportrait mode, a landscape mode, and the like, and between monochromedisplay and color display, for example. With the power-saving modeswitch 8036, display luminance can be controlled in accordance withexternal light detected by an optical sensor incorporated in the tabletterminal. Note that in addition to the optical sensor, another detectiondevice including a sensor such as a gyroscope or an acceleration sensorwhich is capable of detecting inclination may be included in the tabletterminal.

Note that FIG. 7A shows an example in which the areas of the displayportion 8631 a and the display portion 8631 b are the same; however,this example does not limit the present invention. The display portion8631 a and the display portion 8631 b may differ in area or displayquality. For example, one display panel may be capable ofhigher-definition display than the other display panel.

The tablet terminal is closed in FIG. 7B. The tablet terminal includesthe housing 8630, and a solar cell 8633 and a charge and dischargecontrol circuit 8634 with which the housing 8630 is provided. In FIG.7B, a structure including a battery 8635 and a DCDC converter 8636 isillustrated as an example of the charge and discharge control circuit8634.

Since the tablet terminal is foldable, the housing 8630 can be closedwhen the tablet terminal is not used. Thus, the display portion 8631 aand the display portion 8631 b can be protected, which leads toexcellent durability and excellent reliability in terms of long-termuse.

The tablet terminal illustrated in FIGS. 7A and 7B can also have afunction of displaying various kinds of data (e.g., a still image, amoving image, and a text image), a function of displaying a calendar,the date, the time, or the like on the display portion, a touch-inputfunction of operating or editing data displayed on the display portionby touch input, a function of controlling processing by various kinds ofsoftware (programs), and the like.

Electric power obtained with the solar cell 8633 can be used for theoperation of the tablet terminal or can be stored in the battery 8635.Note that the solar cell 8633 can be provided on both surfaces of thehousing 8630. When a lithium ion battery is used as the battery 8635,there is an advantage of downsizing or the like.

The structure and the operation of the charge and discharge controlcircuit 8634 illustrated in FIG. 7B are described with reference to ablock diagram in FIG. 7C. In FIG. 7C, the solar cell 8633, the battery8635, the DCDC converter 8636, a converter 8637, a switch SW1, a switchSW2, a switch SW3, and a display portion 8631 are illustrated. Thebattery 8635, the DCDC converter 8636, the converter 8637, and theswitches SW1 to SW3 in FIG. 7C correspond to the charge and dischargecontrol circuit 8634 illustrated in FIG. 7B.

In the case where power is generated by the solar cell 8633, the voltageof the power generated by the solar cell is raised or lowered by theDCDC converter 8636 so that the power has a voltage for charging thebattery 8635. Then, the switch SW1 is turned on and the voltage of thepower is stepped up or down by the converter 8637 so as to be the mostsuitable voltage for the display portion 8631. In addition, when displayon the display portion 8631 is not performed, the switch SW1 is turnedoff and the switch SW2 is turned on so that the battery 8635 is charged.

Note that the solar cell 8633 is described as an example of a powergeneration means, but this does not limit the present invention. Anotherpower generation means such as a piezoelectric element or athermoelectric conversion element (Peltier element) may be used instead.For example, the battery may be charged with another charging means,such as a non-contact power transmission module which is capable ofcharging by transmitting and receiving power wirelessly (withoutcontact), used in combination.

When the display device described in the above embodiment is applied toeach of the display portion 8631 a and the display portion 8631 b whichare included in the tablet terminal described in this embodiment, higherreliability can be obtained.

This embodiment can be implemented in appropriate combination with anyof the structures described in the other embodiments.

Embodiment 4

In this embodiment, examples of an electronic device including any ofthe display devices described in the above embodiments or the like aredescribed.

FIG. 8A illustrates a portable information terminal. The portableinformation terminal illustrated in FIG. 8A includes a housing 9300, abutton 9301, a microphone 9302, a display portion 9303, a speaker 9304,and a camera 9305, and has a function as a mobile phone. Any of thedisplay devices and the display device with an image sensor described inthe above embodiments can be applied to the display portion 9303.

FIG. 8B illustrates a display. The display illustrated in FIG. 8Bincludes a housing 9310 and a display portion 9311. Any of the displaydevices and the display device with an image sensor which are describedin the above embodiments can be applied to the display portion 9311.

FIG. 8C illustrates a digital still camera. The digital still cameraillustrated in FIG. 8C includes a housing 9320, a button 9321, amicrophone 9322, and a display portion 9323. Any of the display devicesand the display device with an image sensor described in the aboveembodiments can be applied to the display portion 9323.

By application of one embodiment of the present invention, thereliability of the electronic devices can be increased.

This embodiment can be implemented in appropriate combination with anyof the structures described in the other embodiments.

REFERENCE NUMERALS

101: substrate, 102: substrate, 105: gate electrode layer, 107: gateinsulating layer, 109: semiconductor layer, 111 a: source electrodelayer, 111 b: drain electrode layer, 114: first inorganic insulatingfilm, 113: inorganic insulating film, 115: inorganic insulating film,117: organic insulating film, 119: second inorganic insulating film,121: transparent conductive layer, 123: transparent conductive layer,125: liquid crystal layer, 127: transparent conductive layer, 129:second inorganic insulating film, 150: transistor, 170: capacitor, 180:capacitor, 1000: pixel portion, 1001: sealant, 1003: signal line drivercircuit, 1004: scan line driver circuit, 1018: FPC, 4001: substrate,4002: photodiode element, 4016: organic insulating film, 4020: inorganicinsulating film, 4024: alignment film, 4030: transistor, 4032:capacitor, 4034: liquid crystal element, 4036: gate line, 4040:transistor, 4052: counter substrate, 4056: transistor, 4057: gateselection line, 4058: reset signal line, 4059: video signal line, 4071:output signal line, 4084: alignment film, 4086: organic insulating film,4088: counter electrode, 4096: liquid crystal layer, 5042: pixelportion, 8033: clasp, 8034: switch, 8035: power switch, 8036: switch,8038: operation switch, 8630: housing, 8631: display portion, 8631 a:display portion, 8631 b: display portion, 8633: solar cell, 8634: chargeand discharge control circuit, 8635: battery, 8636: DCDC converter,8637: converter, 9300: housing, 9301: button, 9302: microphone, 9303:display portion, 9304: speaker, 9305: camera, 9310: housing, 9311:display portion, 9320: housing, 9321: button, 9322: microphone, and9323: display portion.

This application is based on Japanese Patent Application serial no.2012-161726 filed with Japan Patent Office on Jul. 20, 2012, the entirecontents of which are hereby incorporated by reference.

The invention claimed is:
 1. A display device comprising: a pixel portion comprising: a transistor comprising: a gate electrode layer over and in contact with a glass substrate; a gate insulating layer over the gate electrode layer, the gate insulating layer comprising a first layer comprising silicon oxide and a second layer comprising silicon nitride; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer overlapping with the first oxide semiconductor layer; a first conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer; and a second conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the first conductive layer is in contact with a first side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the second conductive layer is in contact with a second side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein a first insulating film is provided over the first conductive layer and the second conductive layer, wherein a second insulating film is provided over the first insulating film, wherein a third insulating film is provided over and in contact with a top surface and a side surface of the second insulating film and a side surface of the first insulating film, and a top surface of the second conductive layer, wherein a first transparent conductive layer configured to be a pixel electrode is provided over the third insulating film and in an opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein a second transparent conductive layer is provided so as to overlap the first transparent conductive layer, wherein the second conductive layer extends beyond the opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein the first insulating film is in contact with a side surface of the second conductive layer and a top surface of the gate insulating layer, wherein a fourth insulating film is in contact with the third insulating film, wherein the gate electrode layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the third insulating film extends beyond an end portion of the first transparent conductive layer, wherein the gate electrode layer overlaps with the first conductive layer and the second conductive layer, wherein the first oxide semiconductor layer comprises indium, gallium, tin, and zinc, wherein the second oxide semiconductor layer comprises indium, gallium, and zinc, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises a nanocrystal, wherein the first conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the second conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the first transparent conductive layer comprises indium and zinc, and wherein the second transparent conductive layer comprises indium and zinc.
 2. A display device comprising: a pixel portion comprising: a transistor comprising: a gate electrode layer over and in contact with a glass substrate; a gate insulating layer over the gate electrode layer, the gate insulating layer comprising a first layer comprising silicon oxide and a second layer comprising silicon nitride; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer overlapping with the first oxide semiconductor layer; a first conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer; and a second conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the first conductive layer is in contact with a first side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the second conductive layer is in contact with a second side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein a first insulating film is provided over the first conductive layer and the second conductive layer, wherein a second insulating film is provided over the first insulating film, wherein a third insulating film is provided over and in contact with a top surface and a side surface of the second insulating film and a side surface of the first insulating film, and a top surface of the second conductive layer, wherein a first transparent conductive layer configured to be a pixel electrode is provided over the third insulating film and in an opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein a second transparent conductive layer is provided so as to overlap the first transparent conductive layer, wherein the second conductive layer extends beyond the opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein the first insulating film is in contact with a side surface of the second conductive layer and a top surface of the gate insulating layer, wherein a fourth insulating film is in contact with the third insulating film, wherein the gate electrode layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the first transparent conductive layer comprises a region not overlapping with the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the third insulating film extends beyond an end portion of the first transparent conductive layer, wherein the gate electrode layer overlaps with the first conductive layer and the second conductive layer, wherein the first oxide semiconductor layer comprises indium, gallium, tin, and zinc, wherein the second oxide semiconductor layer comprises indium, gallium, and zinc, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises a nanocrystal, wherein the first conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the second conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the first transparent conductive layer comprises indium and zinc, and wherein the second transparent conductive layer comprises indium and zinc.
 3. A display device comprising: a pixel portion comprising: a transistor comprising: a gate electrode layer over and in contact with a glass substrate; a gate insulating layer over the gate electrode layer, the gate insulating layer comprising a first layer comprising silicon oxide and a second layer comprising silicon nitride; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer overlapping with the first oxide semiconductor layer; a first conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer; and a second conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the first conductive layer is in contact with a first side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the second conductive layer is in contact with a second side surface of the first oxide semiconductor layer and the second oxide semiconductor layer, wherein a first insulating film is provided over the first conductive layer and the second conductive layer, wherein a second insulating film is provided over the first insulating film, wherein a third insulating film is provided over and in contact with a top surface and a side surface of the second insulating film and a side surface of the first insulating film, and a top surface of the second conductive layer, wherein a first transparent conductive layer configured to be a pixel electrode is provided over the third insulating film and in an opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein a second transparent conductive layer is provided so as to overlap the first transparent conductive layer, wherein the second conductive layer extends beyond the opening provided in the first insulating film, the second insulating film, and the third insulating film, wherein the first insulating film is in contact with a side surface of the second conductive layer and a top surface of the gate insulating layer, wherein a fourth insulating film is in contact with the third insulating film, wherein the gate electrode layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the first transparent conductive layer comprises a region not overlapping with the first oxide semiconductor layer and the second oxide semiconductor layer, wherein the third insulating film extends beyond an end portion of the first transparent conductive layer, wherein the gate electrode layer overlaps with the first conductive layer and the second conductive layer, wherein the first oxide semiconductor layer and the second oxide semiconductor layer extend beyond end portions of the gate electrode layer, wherein a region exists in the semiconductor device where the first insulating film, the second insulating film, the third insulating film, and the fourth insulating film overlap each other without a conductive layer provided therebetween, wherein the first oxide semiconductor layer comprises indium, gallium, tin, and zinc, wherein the second oxide semiconductor layer comprises indium, gallium, and zinc, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises a nanocrystal, wherein the first conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the second conductive layer comprises a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, wherein the first transparent conductive layer comprises indium and zinc, and wherein the second transparent conductive layer comprises indium and zinc.
 4. The semiconductor device according to claim 1, further comprising: a liquid crystal layer over the second transparent conductive layer.
 5. The semiconductor device according to claim 4, wherein the liquid crystal layer is driven in a fringe field switching mode.
 6. The semiconductor device according to claim 1, wherein a material in the third insulating film differs from a material in the fourth insulating film.
 7. The semiconductor device according to claim 2, further comprising: a liquid crystal layer over the second transparent conductive layer.
 8. The semiconductor device according to claim 7, wherein the liquid crystal layer is driven in a fringe field switching mode.
 9. The semiconductor device according to claim 2, wherein a material in the third insulating film differs from a material in the fourth insulating film.
 10. The semiconductor device according to claim 3, further comprising: a liquid crystal layer over the second transparent conductive layer.
 11. The semiconductor device according to claim 10, wherein the liquid crystal layer is driven in a fringe field switching mode.
 12. The semiconductor device according to claim 3, wherein a material in the third insulating film differs from a material in the fourth insulating film. 